Cisco Systems, Inc. is seeking a skilled ASIC design engineer to drive end-to-end physical design from RTL to GDSII. You will work closely with Front-End teams to translate architectural intent into efficient silicon layouts, focusing on robust PPA and reliable signoff.

The role emphasizes collaboration, problem solving, and leveraging industry-standard tools to push performance while controlling area and power. A strong background in STA, CTS, and LVS/DRC is essential.