What we’re looking for:

We are seeking a highly skilled Associate Staff Design Engineer to join our Silicon Engineering Team. This role involves leading and hands on various stages of BE implementation flow including, but not limited to, Synthesis, Static Timing Analysis (STA) , Logic Equivalence & Low power checks. You will be responsible for constraints development, timing sign-off of high-performance SoCs and ASICs. You’ll work closely with cross-functional teams to ensure timing closure across various operating modes and process corners. Ideal candidate will have exposure to full gamut of BE cycle – synthesis, Place & route, Logic equivalence, UPF & lowe power checks , STA & PV Signoff and should be able to act as BE lead taking care of full BE implementation cycle of our cutting-edge SoCs through advanced physical design methodologies. PPA optimization and Low power implementation methodologies exposure is a must.

Experience Level: 9-10 years

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