**Role Number:** 200669841-3956

**Summary**
Apple's custom silicon is among the most sophisticated in the world — and getting it right requires rigorous transistor-level timing verification and formal verification at every step. Our Custom Timing CAD team builds and owns the flows, tools, and methodologies that make that verification possible. We are looking for an entry-level engineer who is eager to learn, technically curious, and excited to work at the intersection of circuit design and CAD engineering.

**Description**
In this role, you will support and develop flows for two of the most critical sign-off disciplines in custom IC design — transistor-level timing verification using NanoTime and formal verification using ESP. You will partner closely with analog and digital designers across multiple programs and technology nodes, helping them set up flows, debug issues, and achieve clean sign-off. The work you do will directly shape the quality and schedule of ...