Responsibilities & Skills

Lattice Semiconductor is seeking a Design Verification Engineer to join the RnD organization. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.

We are seeking an IP DV engineer with significant hands‑on experience in pre‑silicon Design verification, verification methodologies and UVM/OVM.

• Develop and Review Test Plan based on design specification
• Develop constrained‑Random verification environment for complex DUT
• Implement coverage metrics using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers

Requirements:

• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, SystemVerilog)
• Experience with designing with FPGA is a ...