Advance your career with Ciena as a Digital ASIC Design Engineer in Ottawa. This full-time role centers on ASIC design and integration for innovative WaveLogic products.
Ciena is looking for a qualified engineer with over five years of ASIC design experience. The position involves collaboration, architecture interpretation, and the development of top-level RTL designs while maintaining specialized technology libraries. Delivering quality silicon for telecommunications infrastructure is a key focus.
Key Responsibilities:
• Contribute to ASIC design and integration for WaveLogic technology
• Develop and assemble top-level RTL integrating multiple IP blocks
• Analyze synthesis, timing, layout, and backend reports
• Create timing constraints to support designs
• Validate ASIC prototypes and production silicon in lab settings
Requirements:
• Bachelor’s degree in Electrical or Computer Engineering
• 5+ years of ASIC design experience
• Proficiency in Verilog,...