The candidate will work with team-based VHDL development processes for FPGA-based

designs is required, including VHDL development, simulation, verification, synthesis, timing

closure and hardware-based acceleration.

Requirements:

 In-depth knowledge of Xilinx Virtex FPGAs, and Versal MPSoC.

 Additionally, the candidate must be able to function proficiently in an exclusive UNIX-

based environment.

 The candidate should have in-depth knowledge of UNIX-based scripting

 Xilinx ISE and Vivado experience

 Modelsim/Questa experience

 Laboratory test equipment, network test equipment

 Source code/revision control tools.

 Implementation experience with JESD204B and JESD204C interfaces and realization of

high-performance DSP algorithms are a must.

 Should be able to develop implementation architectures from requirements documents or

high-level specifications/descriptions; use and maintain legacy IP...