Job Description We are seeking a DRAM Layout Engineer to join our DRAM Engineering Group (DEG). In this role you will work collaboratively across Micron’s global footprint in a multi‑project environment. You will plan, develop, and document IP layouts used in DRAM products, ensuring high quality, timely execution, and alignment with global engineering teams.
Responsibilities - Design and develop IP layouts used in DRAM chips, ensuring compliance with specifications and layout requirements.
- Perform layout verification processes activities such as LVS, DRC, and EM checks, conduct quality reviews, and generate documentation.
- Create block‑level layouts on required quality standards.
- Plan and document layout structures and share materials for other teams review and reuse.
Minimum Qualifications - Knowledge or experience in analog layout design within CMOS processes.
- Knowledge of IP layouts and performing ...