Job Description
Develop, implement, and verify VHDL/Verilog firmware for Field-Programmable Gate Arrays (FPGAs) focusing on the real-time classical control channel.
Implement nanosecond-level synchronization protocols (e.g., White Rabbit-PTP) to maintain sub-nanosecond precision across distributed hardware systems.
Design and optimize hardware triggers for immediate photon generation and detection events.
Engineer the logic necessary for high-speed, low-latency “Repeat-Until-Success” feedback loops critical for quantum operations.
Define and provide the hardware abstraction layer (registers, interrupts, and memory-mapped controls) consumed by the higher-level QNodeOS developers.
Collaborate closely with Hardware Engineers to understand board timing constraints, signal paths, and low-level control requirements.
Own the full FPGA development lifecycle from specification and RTL design to testing, timing closure, and system integration.
Drive technical decisions on...