QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Engineering Group > Hardware Engineering

This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities include defining and executing the development of Test methodologies and characterization of High Speed SERDES Interfaces such as PCIe, USB3, UFS, DP, MIPI(DSI,CSI), PLLs and leading edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY IP, IOs, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces. Responsibilities include developing and executing characterization plans for High Speed Interfaces to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring up & debug to qualify designs fabricated at external foundries and performing tec...