Intel Corporation is seeking a Physical Design Engineer in Guadalajara, Mexico, to drive RTL-to-GDS implementation for cutting-edge IP and SoC projects. You will run full physical design flows, from synthesis to GDS, ensuring timing closure, power integrity, and robust sign-off.

The role emphasizes collaboration across teams and continuous PD methodology improvement. The position requires a strong background in RTL-to-GDS, familiarity with Cadence or Mentor Graphics, and solid English