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Lead Design Engineer

Company

Cadence Design Systems, Inc.

Location

Pune, India

Posted

June 01, 2026

Position Overview

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Role Overview:The DV Architect is a senior technical leadership role responsible for the strategic vision and infrastructure of verification for next-generation Tensilica advanced CPU cores and configurable processors. You will define the methodologies that ensure the functional integrity of highly complex instruction set architectures (ISA).

Key Responsibilities:
+ Methodology Strategy: Define and own the long-term DV architecture, focusing on scalability across multiple processor variants and generations.
+ Verification Infrastructure: Architect simulation testbenches in C/C++/RTL and lead the development of reusable UVM environments.
+ Advanced Verification: Champion the integration of formal verification, and AI-driven coverage analysis.
+ Cross-Functional Collaboration: Partner with microarchitecture, RTL design, and software teams to align verific...

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