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Mixed-Signal Design and Verification Engineer
Position Overview
We are seeking a talented and motivated Mixed-Signal Design and Verification Engineer to join our IC development team. The successful candidate will be responsible for the design, modeling, and verification of analog and mixed-signal IPs integrated into complex SoCs. This role involves hands-on transistor-level design as well as behavioral modeling and mixed-signal verification using state-of-the-art EDA tools and methodologies.
Key Responsibilities
Design
Design and simulate analog and mixed-signal circuits such as ADCs, DACs, PLLs, bandgaps, amplifiers, LDOs, and sensor interfaces.
Perform schematic entry, transistor-level simulation, and layout supervision using Cadence Virtuoso or equivalent design environments.
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