Key Responsibilities

• Design layout for leaf cells, standard cells (Stdcell), or sub-blocks.
• Apply a systematic, meticulous, and methodical approach to IC layout design.
• Interpret DRC/LVS and other physical verification checks to ensure design accuracy.
• Demonstrate ownership and proactively plan work to meet project timelines.
• Collaborate effectively with internal teams to ensure successful layout project execution.

Minimum Qualifications

• Bachelor’s, Master’s, or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology, or related fields.
• Graduation within the last 2 years (Bachelor’s, Master’s, or PhD).
• Strong knowledge of electronic circuit concepts.
• Experience using circuit simulation and design tools.
• Effective interpersonal and problem-solving skills.
• English communication skills (conversational level required).
• Self...