Job Description
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Our client is expanding their High Speed IO team and is looking for a Lead PCIe Engineer with strong background in PCIe architecture and RTL implementation within SoC or ASIC environments.
In this role, you will define, design and integrate PCIe subsystems for advanced semiconductor solutions. A key focus will be the interaction between the PCIe subsystem and processor cores using AMBA CHI based coherency.
You will collaborate closely with architecture, RTL, verification and physical design teams to deliver scalable processor solutions.
Location : Barcelona, Spain - Hybrid
Responsibilities:
As a Lead PCIe Engineer, your broad responsibilities will include but are not limited to:
Define and implement PCIe architecture and RTL solutions
Integrate PCIe IP wi...