PVH (Tommy Hilfiger/Calvin Klein) is seeking an ASIC design specialist to drive netlist to GDSII processes across block and subsystem levels. You will contribute to hierarchical partitioning, floor planning, and IR drop analysis while ensuring robust timing closure through STA and ECO loops.

You will also optimize scan chains, perform clock-tree planning, and create TCL scripts to streamline tool usage across Synopsys ICC/ICC2 and Cadence Innovus in a high-performance, low-power environment.