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Principal Engineer (Integration Yield Defect)

Company

Vanguard International Semiconductor Corporation (VIS)

Location

singapore, singapore

Posted

June 24, 2026

Position Overview

Job Description
  • Supervise YDD Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operation
  • Train and certify DO Associate Engineers on recipe creation and defect source knowledge
  • Maintain and enhance internal SOP/CAS and involve in internal;/external audit
  • Operate FIB/SEM/EDX for inline failure analysis
  • Operate and create recipes in Brightfield, Darkfield and other YDD tools
  • Maintain and housekeep Brightfield, Darkfield and recipes of other YDD tools
  • Perform partition analysis on defect source and detailed reports on issues
  • Build and develop defect source library and tool’s defect source fingerprinting
  • Track inline defect performance by layer/process tool/chamber on weekly basis
  • Perform killer ration analysis
  • Perform defect characterization by process tools
  • Continuous improvement activities on defect reductions with Modules / vendor...

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