Overview

Elevate your career at Synopsys as a Principal High-Speed Layout Engineer in high-speed analog and mixed-signal layout. Take the lead in SerDes IP development while thriving in a team-oriented workplace. As an engineering leader with Synopsys, you will harness your expertise in multi-Gbps NRZ and PAM-based SerDes technologies.

Responsibilities

• Define layout scope and scheduling for projects
• Accelerate layout development for SerDes IP
• Present project status and mitigation plans to stakeholders
• Perform hands-on debugging and issue resolution
• Collaborate on packaging strategies, where applicable

Qualifications

• Deep familiarity with high-speed SerDes layout
• Expertise in differential routing and reliability-driven layout
• Robust problem isolation and debugging skills
• Proficient in Synopsys Custom Compiler or similar tools
• Experience with verificatio...