We are hiring a Principal RTL Lead to drive the design and development of next-generation Ethernet subsystems for custom ASIC silicon , supporting 400G/800G+ data center infrastructure .

This is a highly technical, hands-on role focused on solving complex challenges in high-speed digital design, multi-lane data processing, and Ethernet protocol implementation .

=' Key Responsibilities

• Define micro-architecture for high-bandwidth datapaths and control logic


• Lead SystemVerilog RTL design for Ethernet subsystems


• Implement IEEE 802.3 standards , including:


• RS-FEC (Reed-Solomon)


• Multi-Lane Distribution (MLD)


• Auto...