Job Description
Technical Leadership (DDR5 / DDR6)
Own and guide the architecture, design, and implementation of DDR5 PHYs and contribute to DDR6-ready architectures.Provide technical oversight for critical analog and mixed-signal blocks, including:High-speed TX/RX datapathsAdvanced equalization, termination, and training circuitsDLL/PLL-based clocking solutions for multi-GHz operationVoltage, reference generation, and power-aware IO designDrive closure on timing, jitter, noise, SI/PI, and PVT robustness for aggressive DDR5/DDR6 data rates.Ensure compliance with JEDEC DDR5 specifications and alignment with evolving DDR6 standards and industry direction.Lead post-silicon bring-up, characterization, debug, and yield improvement, including lab and customer-system correlation. People & Organization Leadership
Build, lead, and mentor a team of analog and mixed-signal designers focused ...