Perform analog circuit block, subsystem and top-level layout and verification using state‑of‑the‑art tools (Cadence Virtuoso‑VXL) and techniques.

Responsibilities

• Perform analog circuit block, subsystem and top-level layout and verification using state‑of‑the‑art tools (Cadence Virtuoso‑VXL) and techniques.
• Participate in layout design of analog circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations.
• Participate in layout design reviews.
• Plan block level schedule.

Qualifications

• Bachelor's Degree in Electrical, Electronics Engineering, or Microelectronics with VLSI exposure.
• 2-5 years of job experience in analog layout understanding and hands‑on experience in analog layout from scratch, implementation of analog layout techniques, IR drop/EM analysis.
• Good understanding of analog circuit layout concepts in submicro...