BYTEDANCE PTE. LTD. is seeking a senior engineer to lead analog/mixed-signal design for complex SoC IPs, driving performance, reliability and power efficiency.

The role spans from concept through production in advanced process nodes, including oversight of layout and cross-disciplinary collaboration. Candidates should have strong IP design experience (PLL/DC-DC/LDO/Bandgap/Amplifier/ADC/DAC), plus Cadence tooling expertise and deep device-physics understanding.