Job DescriptionCollaborate with foundries, EDA companies, and internal design teams to develop and maintain Process Design Kits (PDK) for advanced Silicon/PKG processes on 3D/2D IC design platforms.
Requirements:
Experience in one or more of the following areas:
1.Development and maintenance of PDK using Cadence or Synopsys, including quality assurance and check.
2. Development and maintenance of Place and Route TechFile.
3. Physical verification rule coding, such as DRC, LVS, PERC, and LPE.
4. Experience in 3DIC, CoWoS, Physical Design, or analog layout is a plus.Requirement1. Familiar with PDK/Technology file development, knowledge in both analog and digital is a plus
2. Familiar with EDA tools, Cadence SKILL, Tcl, Python or any script coding