RTL Design Engineers

Location: Bangalore

Experience: 4+ Years

Notice Period: Immediate Joiners / 0–15 Days Notice / Currently Serving Notice Period

Job Summary

We are looking for a highly motivated RTL Design Engineer with 4+ years of experience in front-end VLSI design. The ideal candidate should have strong RTL design and integration experience, with expertise in one or more of the following domains: RDC, MIPI, DDR, or LPDDR.