Job Description1. Flagship Smartphone chip integration
2. Automotive SoC chip integration
3. Chip integration methodology and automation tool development
4. Timing constraint and analysis
5. SoC Floorplan Architecture
6. SoC Clock Architecture

#LI-LL1Requirement1. Experience with RTL design, integration(SOC and IPs) and verification
2. Knowledge of STA, timing constraint and timing concept about advance nodes
3. Experience with EDA tools and scripting languages (Perl, Tcl) used to build tools and flows for complex environments
4. Good communicating skill is a plus
5. Experience with DFT and test mode is a plus