Key Responsibilities

• Perform analog circuit block, subsystem and top‑level layout and verification using state‑of‑the‑art tools (Cadence Virtuoso‑VXL) and techniques.
• Lead/Co‑lead layout design of analog circuits (block/IP/chip) including floor planning from scratch, performing routing & layout verification and resolving violations.
• Conduct layout design reviews internally & externally with circuit designers.
• Plan overall project schedule and distribute tasks to project team members.
• Guide and coach junior engineers for on‑time delivery and quality.

Required Qualifications

• Bachelor’s Degree in Electronic/Microelectronics/Electrical Engineering with >5 years of job experience in analog layout.
• Good understanding and hands‑on experience in analog layout from scratch, including implementation of analog layout techniques and IR‑drop/EM analysis.
• Deep understanding of analog circuit layout ...