Lead end‑to‑end Validation Run execution in a high‑pressure, fast‑paced environment, ensuring on‑schedule starts/completions, risk‑aware re‑plans, and efficient IQP/ETV material usage.
Own time‑bound data crunching pipelines (automated log parsing, metrics aggregation, anomaly ranking) and deliver decision‑ready summary reports and sightings by agreed Cycle Time.
Guarantee coverage completeness across MBIST and flows; drive Hot/Cold corners, TSV screen/AQLK, async timing boundary coverage, and evidence‑backed closure.
Platform Leadership
Develop and debug test programs on SM3/Cobra and Advantest V93K; enforce code quality, reviews, and release discipline.
Align hardware configs (handler, socket, loadboard, probe card) to test intent and throughput targets.
Advanced Analysis, Verilog Simula...
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