Static Timing Analysis (STA) Lead

Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead STA Engineer working on timing closure of complex high performance ASIC in latest technology nodes.

As a STA lead you will be working on PrimeTime based flow development and timing closure of multi-million gate SoC design for all modes and all corners in 16/12/7/5nm processes.

Location : Bangalore, KA. India

Qualification and Skillset Requirements

Minimum BE/BS degree (Masters preferred) in Electrical/Electronics Engineering/VLSI
10+ years of practical experience in Static Timing Analysis (STA) using Primetime
Strong fundamentals in digital ASIC design
Understanding of SoC design and implementation methodology and challenges
Understanding of one or more of design flows like Synthesis, Constraint development and STA (Functional and DFT modes) and Physical Design
Good hands on expertise with in...