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Job Description:
He/she should have strong knowledge of the following with 12-15 years of experience in Ethernet Subsystem/SoC Level Functional verification
Working experience in Ethernet Subsystem/SoC verificationExpertise to develop verification environments using System Verilog and UVM Expertise to develop BFMs / Checkers / monitors / ScoreboardsMust have developed block/system level verification plans and tests.Must have capability to debug test failures to find the root cause.Must have worked on code / functional coverage.Experience in constrained random verification.Domain skills: Ethernet (MAC, PCS and SerDes)/S...