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System-on-Chip Test Developer

Company

UST

Location

Bengaluru, Karnataka

Posted

June 03, 2026

Position Overview

Hi,


Please find the JD below:-

Must have a solid understanding of SoC verification flows and experience with SoC verification for multiple clients.

- Should be an independent learner with experience in developing C-based tests for PCIe/LPDDR based SoC's.

- Should have a very good understanding of PCIe (Gen5, Gen6), PIPE protocol.

- Should be able to use the PCIe/LPDDR VIP and generate test cases and scenarios.

- Should be able to independently debug PCIe/LPDDR test cases in SoC level environments.

- Must be an individual contributor.

- Must possess strong debugging skills in SoC Verification.

- Candidates should have 5+ years of relevant experience.


Please share your resume to [email protected] or refer your friends.


Regards,

Jaya

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